Yet another xMesh question

[fdeutschmann]

Actually three (related) questions; for these, assume an Epiphany configured as in page 26 of the rev 4.13 manual (64 core, upper left core is 32,32):

1) When an eCore sends an off-chip write transaction on the xMesh network, is the packet routed orthogonally to it's exit direction? An example in plain English: eCore (39, 39) sends a write destined for (31, 32), is the packet routed West first, or does it just travel North (assuming an active North eLink)?

2) If eCore (39, 39) sends an off-chip write destined for (31, 31), i.e. both West and North off-chip (assuming that both West and North eLinks are connected), which eLink does the packet exit from? Does this follow the route along rows first routing?

3) I assume that XMESHROUTE has a primary use to config which direction to route transactions so that they reach an active eLink; what system component is responsible for setting this properly on the eCores (automatic setting from Epiphany internal logic, FPGA glue, basic init s/w on the eCores, host software)? (If set by internal logic, does that only happen at chip reset, or on any link power state config change?) And, what happens if a packet arrives at a border core destined for an eLink which is powered down? (e.g.: what happens if an off-chip write destined for (39, 31) arrives at (39, 32) and the XMESHROUTE is clear and the West eLink is powered down; is the packet re-routed automatically, or...?

Apologies if these should be obvious; I have some assumptions but would appreciate confirmation!
Thanks!
-frank