Hello everybody,
I have read the document about parallella board and I think there is a possibility to attach I/O pins from PEC south and PEC north directly witch FPGA chip zynq. By redirecting signals in FPGA Xilinx project. Am I right?
I will probably need to use more than 46 I/O ports, and parallella board looks like really great low power and powerful solution.
Next thing for me, it looks like it is be enough to own JTAG cable to program FPGA. Have anybody some good experiences with some useful JTAG cable for Linux? Probably with Xilinx software. I know, Xilinx ISE design tools and Vivado design tools supports Linux. In the past I have been able to run ISE under linux, but I didn't find the programing interface.
Thanks for help.